International and National Conference:
- Mrs.K S Geetha, "Modular VLSI architecture for computing multiplierless fast DCT
using number theoretic approach" at International Conference on Cognition and
Recognition, India May 2008.
- Mrs.K S Geetha, “Fast multiplier less recursive transforms for Ramanujam Number”,
International conference on DSP, Aligarh, India, 13th March 2009.
- K.S.Geetha," A Novel recursive Multiplier algorithm for 2-D DCT", International Conference on signal processing & computer networks, Singapore, Aug 2009
Book Publication/Review:
- “Signal Processing First “, Pearson publications 2006 (Review).
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