Achievements:

• ISTE chairperson, RVCE chapter for the current year.
• External Expert in the selection board for recruiting the scientists for DRDO.

List of Publications:

Papers Published in International Journals:

1. Padmaja K.V and Dr. S. Ravishankar, “Analysis of Dual latency & Dynamic Rate Repartitioning Concepts in VDSL2 with Downstream Power Backoff” ICGST DSP Journal, issue1, Vol 8, (pp No.9-14) , Dec2008.
2. Padmaja K.V, Uma B.V and Dr. S. Ravishankar, “Bit loading algorithm to maximize datarate with energy constraint for ADSL in the presence of NEXT & FEXT” WSEAS Transaction on Communication Issue 12 Vol 5.(pp No2225-2231), Dec2006.
   

International Conference:

1. Padmaja K.V, Santosh Sridhar and Dr. S. Ravishankar, “Dual Latency Operation In VDSL2 with Downstream Powerback off”, IEEE sponsored International Conference “TENCON 2008” held at Hyderabad., 18th to 21st November 2008.
2. Padmaja K.V Santosh Sridhar and Dr. S. Ravishankar, “Implementation of Dual Latency Operation In VDSL2 with Downstream Powerback off on DSP chip”, International Conference on Signals & Electronic Circuits, held at KRAKOW, POLAND, 14th to 17th September 2008
3. Padmaja K.V, Uma B.V and Dr. S. Ravishankar, “Implementation of Novel Bit Loading algorithm in ADSL transmitter on DSP “, IEEE sponsored International Conference ICCIMA-07, held at MEPCO, SCHLENK , Engineering college Sivakasi, Tamil Nadu, 13th to 15th December 2007.
4. Padmaja K.V, Santosh Sridhar and Dr. S. Ravishankar, “Performance Evaluation of Different Bit Loading Algorithm”-ICCC International Conference held at RVCE, Bangalore, India,21st to 23rd November 2007.
5. Padmaja K.V, Uma B.V and Dr. S. Ravishankar, “Realization of Adaptive NEXT Canceller For ADSL On DSP Kit” Proceedings of the 5th WSEAS Int. Conf. on DATA NETWORKS, COMMUNICATIONS & COMPUTERS, Bucharest, Romania,. 16th to 18th October 2006 (pp No36-41)
6. Padmaja K.V, Uma B.V and Dr. S. Ravishankar, “A Time Domain Equalizer in Discrete Multitone Systems”, First International Conference on Frontier Technologies, Adhiyaaman College of Engg., Hosur, Tamilnadu.,6th to 8th September 2006,(pp No.345-349)
7. Padmaja K.V., Uma B.V and Dr. S. Ravishankar, “Simulation and Implementation of a practical ADSL environment on DSP Kit” Proceedings , 18th International Enformitika Conference on Engineering, Computer and Information Science CISE-06 at Vienna, Austria, 16th to 18th October 2006 (pp No. 239-244).
   

National Conference:

1. Padmaja K.V, Uma B.V and Dr. S. Ravishankar. “Bit loading algorithm for ADSL”, Second National conference - Control Instrumentation System Conference (CISCON 2005), MIT, Manipal, 11th to 12th November 2005, pp No. (477-479)
2. Padmaja K.V, Uma B.V and Dr. S. Ravishankar. “Mathematical modeling of ADSL environment”, National Conference on computational mathematics in engineering applications NCCEMA, RVCE, Bangalore. 21st to 22nd July 2005,(pp No.84-92)
3. Padmaja K.V, Uma B.V and Dr. S. Ravishankar ., “Analysis of Multiple Interference Effects in Discrete Multitone Modulation based Asymmetric Digital Subscriber Loops”, National conference on Advanced Communication techniques ACT-05, Bhilai Institute of Technology, DURG, Chattisgarh, 5th to 6th April 2005, (pp No. 191-201)

Awards:

1. Academic Excellence award for the year 2007-08 and 2008-09 by RSST Trust.